CE011 - Dynamic Clock Division for Low-Power Operation

by Microchip Technology

CE011 - Dynamic Clock Division for Low-Power Operation

The attached code example demonstrates how the programmable post-scaler may be used to dynamically change the system clock frequency. The workspace contains 2 C files - main.c and clock_divide.c

About this Code Example

Microchip's dsPIC30F Digital Signal Controllers provide several means to reduce power consumption while the application is running. Power consumption is directly proportional to the operating MIPS. In certain applications, it may be possible to run the device at lower MIPS for a certain tasks and at higher MIPS for certain compute-intensive tasks. In such applications, one of the mechanisms available to the user to dynamically increase or decrease the system clock frequency is to use the programmable system-clock post-scaler. This feature allows the application to divide the system clock by 4, 16 or 64 at run-time by writing to the POST bits in the OSCCON register.

The attached code example demonstrates how the programmable post-scaler may be used to dynamically change the system clock frequency. The workspace contains 2 C files - main.c and clock_divide.c

The code in clock_divide.c contains a C function which has the following prototype:
Function:       int clockDivide(unsigned int)
Input:          int data type equal in value to 1, 4, 16 or 64
Return:         RET_CODE_OSC_SUCCESS for a successful clock divide operation
                RET_CODE_OSC_ERROR for an illegal clock divide request
                (i.e. values other than 1, 4, 16, 64)
Description:    This subroutine unlocks the OSCCONL SFR and then writes the
                correct requested clock divide value into the POST<1:0> bits in
                OSCCONL.
The code in the main.c file simply calls the function above and requests to divide the system clock down by 64.

  • Current Version: 1.0.0
  • Updated: Jun 23, 2012
  • Downloads: 735
  • Rating: 0/5 (0 votes cast)
  • Status: Released
    • MPLAB Version: V8.xx or above
    • C Compiler: MCC18 v3.30 or above
    • Development Tools: dsPICDEMâ„¢ 1.1 Development Board
    • Supported Devices: dsPIC30F6014A

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    Release History

    CE011 - Dynamic Clock Division for Low-Power Operation  (current version) June 22, 2012
    First Release to ECS