CE139 - 10-bit ADC Sampling at 2.2MSPS

by Microchip Technology

CE139 - 10-bit ADC Sampling at 2.2MSPS

This test code is designed to sample channel AN0 at 2.2MSPS (single-shot acquisition) using an ADC interleaving technique. This will allow 24H/33F devices with 2 ADC modules to double the maximum sampling rate vs. a single ADC.

About this Code Example

This test code is designed to sample channel AN0 at 2.2MSPS (single-shot acquisition) using an 
ADC interleaving technique. This will allow 24H/33F devices with 2 ADC modules to double the 
maximum sampling rate vs. a single ADC.

The method requires 2 sample/hold amplifiers from each ADC module. You configure
both ADC, then you start one ADC and enable and wait N cycles to start the second ADC. 
These N cycles will depend on ADC sampling and converting speed, for example if conversions
last 12 Tad cycles (10-bit mode), then we need to wait 6 Tad before enabling second ADC.

Read more in the enclosed Readme file.
  • Current Version: 1.0.0
  • Updated: Jul 21, 2011
  • Downloads: 2009
  • Rating: 4/5 (1 votes cast)
  • Status: Released
    • MPLAB Version: latest
    • C Compiler: MPLAB Compiler for PIC24 MCUs or dsPIC DSCs
    • Development Tools: Explorer 16 Dev Board
    • Supported Devices: PIC24H, dsPIC33F

Reviews

  • Test Review  (current version)

    This works well, however you need to keep track of the interlaced samples from the two ADCs.

    4/5 by David Martin on July 26, 2011 Flag (Spam | Inappropriate)

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    Release History

    CE139 - 10-bit ADC Sampling at 2.2MSPS  (current version) July 21, 2011
    This is the updated code example as of 12/03/09.